1
|
|
2
|
- On page 6, the correct sentence is FLASH based FPGA offers lower
operating frequency.
- On page 52, Figure 4-8 needs to be replaced with Fig.10 of paper IV.
- On page 74, StrategyA3 output data is 421 bytes and for StrategyA4 the
output data is 411 bytes.
- On page 91, the timing is 235 msec instead of 215 msec.
- On page 91-92, the supply voltage is 3.6 instead of 3.5.
- On page 102, paper VII and VIII paper numbering should be interchanged.
|
3
|
|
4
|
- Introduction
- Challenges
- Architectures analysis
- Data reduction techniques
- VSN with SRAM based FPGA
- Conclusion
|
5
|
- Camera theory research in 5th century.
- Camera technology started in 20th century.
- Use of camera for surveillance started in 1942.
|
6
|
|
7
|
|
8
|
- The technological development have enabled camera to integrate
different components.
|
9
|
|
10
|
|
11
|
- Generally researchers employ two approaches.
- Capture and process locally and transmit final results.
- Capture and transmit to server for processing.
|
12
|
- Partitioning processing load among
- Software
- Hardware
- Server.
|
13
|
- Particle detection
- Bird detection
- People counting
- Remote meter reading
|
14
|
|
15
|
- Data sent is approx. 114 Bytes
|
16
|
- Data sent is approx. 250KB
|
17
|
- Data sent is approx. 500 Bytes
|
18
|
|
19
|
|
20
|
|
21
|
|
22
|
|
23
|
- Bi-level image coding
- Bi-level video coding
|
24
|
- Investigated compression schemes
- G4
- G3
- JBIG2
- Rectangular
- GZIP
- GZIP_pack
- and JPEG_LS
|
25
|
- Data reduction beyond limit of simple image coding.
- Bi-level video codec is required but not available.
- Coding complexity needs to be reduced.
|
26
|
- Bi-Level video codec functionality
- Image coding
- Change coding
- ROI coding
- Change-ROI coding
|
27
|
|
28
|
- Area of image with objects is coded.
|
29
|
|
30
|
- G4 used 2-Dimensional line by line coding.
- In this, the position of changing picture elements rather than
alternating black and white runs are calculated.
|
31
|
|
32
|
|
33
|
- Reduced energy consumption of 1.5 to 376 times.
- Reduced output data by a factor of approximately 3 to 246.
|
34
|
- SRAM based FPGA for duty cycling
- Low complexity background subtraction
|
35
|
|
36
|
|
37
|
|
38
|
|
39
|
|
40
|
|
41
|
- An energy efficient and programmable VSN is developed and implemented.
- Low complexity
- Generic architecture
- To reduce communication energy on hardware implemented VSN, a bi-level
video coding is developed and implemented.
- A VSN with proposed Bi-level
video coding reduced energy consumption by a factor of 1.5 to 376.
- A VSN with SRAM based FPGA has been evaluated for duty cycle applications.
- Depending on application a lifetime of 3.2 years with 37 kJ energy
(AA).
|
42
|
- This study can be extended for applications which require greyscale or
colour data for classification.
- Bi-level video coding which handle movement of objects.
- A taxonomy which has been proposed can be improved by making it more
exhaustive.
- Wireless smart camera technology can be integrated for Internet of
things.
|
43
|
- Prof. Mattias O’Nils
- Najeem Lawal
- Prof. Bernhard Rinner
- Committee members
- All audience
|
44
|
- http://www.orissadiary.com
- http://lifeboat.com/ex/security .preserver
- http://www.epicsysinc.com/bl og/machine_vision_history
- http://edenprairieweblogs.org/scottneal/page/45/
- http://www.marketingsavant.com/2011/11/getting-started-in-a- social-media-career-part-i/
|