vOn
page 6, the correct sentence is FLASH based FPGA offers lower operating frequency.
vOn
page 52, Figure 4-8 needs to be replaced with Fig.10 of paper IV.
vOn
page 74, StrategyA3 output data is 421 bytes and for StrategyA4
the output data is 411 bytes.
vOn
page 91, the timing is 235 msec instead of 215 msec.
vOn
page 91-92, the supply voltage is 3.6 instead of
3.5.
vOn
page 102, paper VII and VIII paper numbering should be
interchanged.