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Plannering:
Kursplanering
Godkänd?
Föreläsningar:
F1: Introduktion till SystemC
F2: Grundläggande modellering i SystemC
F3: RTL modellering i SystemC
F4: Analogmodellering i SystemC
F5: Fixed point i SystemC
F6: RPC modellering i SystemC
F7: Förfining av kommunikation i inbyggda system mha SystemC
F8: Hantering av olika MoCs i SystemC
Litteratur:
1. L. Lavagno, A. Sangiovanni-Vincentelli, E.Sentovich, "Models of Computation for Embedded Systems", System Level Synthesis Eds. AA Jerraya, J.Mermet, Kluwer Academic Publisher, 1999, pp 45-102.
2. R.B. Ortega, L. Lavagno, G. Borriello, "Model and Methods for HW/SW Indulectual Property Interfacing", System Level Synthesis Eds. AA Jerraya, J.Mermet, Kluwer Academic Publisher, 1999, pp 45-102.
3. M. O'Nils, Specification, Synthesis and Validation of Hardware/Software Interfaces, ISRN KTH/ESD/AVH--99/4-SE.
4. J. Björnsen, T.E Bonnerud, and T. Ytterdal, "Behavioural Modeling and Simulation of Analog-to-Digital Converters using SystemC", Proceedings of IEEE Norchip, 2001.
5. Bonnerud, T.E.; Hernes, B.; Ytterdal, T, "A mixed-signal, functional level simulation framework based on SystemC for system-on-a-chip applications", Proceedings of the IEEE 2001 Custom Integrated Circuits Conference.
6. SystemC homepage
Labbar:
Laboration 1, Grundläggande modellering och RTL modellering
Laboration 2, RPC modellering
Laboration 3, Fixed point hantering
Laboration 4, Kommunikationsförfining
Laboration 5, Modellering av olika MoC:s i SystemC
Projekt:
Projekt 1: "Extending SystemC for conceptual modeling and simulation methods for spatio temporal video systems"
Projekt 2: "Modeling and comparison of different video filters for error concealment"
Projekt 3: "Development of a processor memory system that allows analysis of bus activity"
Projekt 4: "Modeling and design refinement of video quality measurement system"
Projekt 5: "Develop a abstract current model for a
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